>2012-02-10

2012-02-10

• Test Plan / Eng. Design revision
• Update stock list for HFA production
• Preliminar meeting (firmware) 

2012-02-13

• Test Plan / Eng. Design revision
• Discussion with Nuno Cláudio - Labeling for ATCA-PTSW-AMC4 panels (AMC cutaway carrier) - Decided to try sticker printed labels.

2012-02-14

• Replaced de-jitter unit to 874003-05 (no apparent changes in behaviour)
• Updating Eng. Design document.

2012-02-15

• Firmware - PCIe registers planning (to proceed any further, meeting with Bernardo Brotas / Álvaro Combo and Jorge Sousa is mandatory) . Revision of all FPGA IOs.
• HFA RTM boards expected tomorrow in Coimbra.
• Deactivated Source Off Site. 

2012-02-16

• Update ex SOS files on SVN
• Preparing 1st RTM board for test

2012-02-17

• Start tests with RTM
• Meeting to discuss Firmware

2012-02-20

• Continuing RTM tests
• Preparing firmware structure

2012-02-21

• Started writing firmware register list

2012-02-22

• prototype testing
• writing firmware register list

2012-02-23

• prototype testing
• SIADAP

2012-02-24

• Concluded draft version of firmware register list
• Received motherboard for prototype testing
• Using a different computer for testing prototypes (Nuno Cruz). 

2012-02-27

• Start setup of new computer
• Tests with new computer - RTM v2 works Gen 2 full lanes. RTM v2.1 not.

2012-02-28

• Preparing modules to send to IST
• Sent carrier v2, RTM v2.1 to IST

2012-02-29

• Tests in IST - RTM v2.1 working Gen 2 full lanes with IST carrier
• Writing abstract for RT2012

2012-03-01

• Tests in IST - RTM v2.1 working Gen 2 (missing lanes) with carrier #2
• Boards need to be returned to Coimbra for further testing
• RT2012 abstract reviews

2012-03-02

• RT2012 abstract submission
• Xilinx ISE 13.4 install

2012-03-05

• Setting four RTM boards for test (resistor settings)
• Installed Windows 7 on test host computer - OK
• Installed ITER CODAC OS on test host computer - problem with network

2012-03-06

• Installed Fedora 16 on test host computer - OK
• Restart tests with RTM modules. PCI x16 port good test. Boards 5 and 4 TEST OK
• Boards 2 and 3 need aditional pressing and soldering

2012-03-07

• RTM board #1 had soldering problem on at least one IC (U2). Short circuit detected.
• Packing RTM modules #1,#2,#3 and shipped to IST, Lisbon.
• Create/add/update files to ITER SVN - ATCA-PTSW-AMC4 and ATCA-PTSW-AMC4_RTM panel files.

2012-03-08

• Board #5 port good test, cable 3m - OK (led ON)
• Board #5 port good test, cable 7m - OK (led ON)
• Board #4 port good test, cable 3m - OK (led ON)
• Board #5 port good test, cable 7m - KO (led blinking - no pattern, not detected upon lspci command) - UPDATE board now OK for 1m,3m  7m (after tentative rework)
• PPS test - PPS signal detected on boards #4 e #5 (currently assigned to PIN 40 of external timing connector)

2012-03-09

• Working on firmware for PCIe endpoint with Ana Fernandes & Álvaro Combo
• Online tests of RTM boards #1,#2,#3 with António Batista - still not working

2012-03-12

• Remake of aquisition proposals
• Received Boards #1,#2,#3 (not working in IST). Confirmation of problems in Coimbra.
• Working on firmware for PCIe endpoint with Ana Fernandes & Álvaro Combo

2012-03-13

• Developing Firmware for PCIe FPGA endpoint (with Ana Fernandes).
• ATCA products engineering design file revision.
• Cleaning and solder rework on board #1.

2012-03-14

• Begin tests of firmware. 
• Recovered Board #1 (not working in IST) Board is now working.

2012-03-15

• Detected problem with capacitors on PCIe lanes.
• After new capacitors soldered PCIe endpoint firmware is working. Tests were made for Gen1 x1, Gen1 x4 and Gen2 x4 (5.0 GT/S)
• Started revision of boards #3 and #4 - detected soldering-component alignment problems.

2012-03-16

• Sent boards #2,#3 to IST for rework
• Started new version of firmware which contains all functionalities so far (IRIG, crosspoint switch & PCIe) uder the working folder name of "PCIeEndpoint"

2012-03-19

• Continuing developing "PCIeEndpoint" folder firmware version.

2012-03-20

• Completed "PCIeEndpoint" firmware - now working (upload successful). 

2012-03-21

• Checking components to send to HFA for assembling - ATCA-PTSW-AMC4 BOM updated.

2012-03-22

• Firmware - Started adding Ethernet module (Trimode embedded Ethernet)

2012-03-23

• test carrier (IPMC) sent to Lisbon to add components
• Firmware - Adding Ethernet module (Trimode embedded Ethernet) - upload successful - needs test

2012-03-26

• Received carrier and 2 RTMs (#2, #3 and passive) from Lisbon - tests show that carrier board lost program on platform flash but is working ok. 
• RTM #2 was tested - working ok (after rework in Lisbon)
• RTM #3 was reworked (soldering on re-drivers and cleaned)

2012-03-27

• Test RTM board #3 - board OK after rework and cleaning.
• Sent carrier and 2 RTMs (active and passive) back to Lisbon after repair

2012-03-28

• Writing abstract SOFT 2012
• Arrived module RTM #5 with transceivers and test carrier (IPMC)
• Start reading Xilinx's TDR documents

2012-03-29

• Writing abstract SOFT 2012
• Components arrived to HFA
• Detected some components that were not sent to HFA. Will be sent today/tomorrow.

2012-04-03

• Installing programs for AD9511. Discussion with R. Pereira (AD9511)
• Soldering components for AD9511.

2012-04-04

• Writing programming files for AD9511

2012-04-11

• AD9511 - Toquim's coe file is properly programmed - hardware seems to be OK.
• Modifying Toquim's coe file for needed clocks frequencies and other settings.

2012-04-11

• AD9511 - version 4 (with OUT0,1,2 OFF is now loaded - works OK).
• Revising abstract for R. Pereira.
• Adding (again) Ethernet core for test, now that 125MHz clock is available.