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Page last modified 14:09, 9 Jan 2012 by jsousa

Engineering Design

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    Version as of 19:02, 28 Jun 2026

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    • Block diagrams (main module and RTM module);
    • Schematics (main module and RTM module) - Cadence Orcade Capture files;
    • PCB (main module and RTM module) - Cadence PCP Editor files;
    • Main module firmware - Xilinx ISE source code files;
    • IPMC software - C source code files;
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